Ppl-accel mailing list

["Choi, Jaemin" <jchoi157 AT illinois.edu>]

I also have a take-home exam starting tomorrow so I'll have to miss it.

One thing to report is that I've been working on debugging the new GPUManager with ChaNGa,

and found out that the the reason that the cudaMemcpys have to be synchronous is that the frees in the runKernel functions need to be called after the memcpys are actually complete.

Other than that there doesn't seem to be anything in the modified code that could cause the hang (possibly caused by a race condition) that occurs more frequently (and earlier) as more cores are used.

I should note that with a few cores (1-5) the test (teststep in ChaNGa) completes almost all the time.

I've been testing this on Titan, but because of the complexities caused by the interactive job environment and aprun I've just moved to Bridges.

I am able to reproduce the hang on Bridges, so I'll continue the debugging there.

-------- Original message --------

From: Michael Robson <mprobson AT illinois.edu>

Date: 5/7/18 11:31 PM (GMT-06:00)

To: ppl-accel AT lists.cs.illinois.edu

Subject: [[ppl-accel] ] 5/8 Meeting 11 in 4102

Agenda

- Progress Reports

- Two Week Plans

- etc

Note: I will not be in attendance due to a final exam.

--

Michael Robson <mprobson AT illinois.edu>

PhD 

Candidate in Computer Science

University 

of Illinois at Urbana-Champaign

http://charm.cs.illinois.edu/people/mprobson